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FPGASID Ankündigung Firmware Updates

    Neues FPGASID Firmware release:


    * modify workaround for DE00 bus collision problem:
    - Disable read acces at DE00 Adresses to avoid bus conflicts.
    * swap potX and poty signals between CPLD and FPGA
    * increment revision number to 2
    * fix Source EXTIN setting in register 31 ("disabled" and "other SID" were swapped)
    * fix advanced digi playback (e.g. in Coma Light)
    * fix handling of test bit


    Release download hier.

    Und wieder eine neue Firmware:


    * improve clock distribution to avoid problems caused by bad clock signal quality in certain C64 computers
    * transfer revision number to FPGA during startup via the potx/y mechanism.
    * reduce power consumption
    * capture CPLD revision number on startup
    * bugfixes in paddle processing
    * modify heartbeat frequency to better match 1MHz and 16MHz clock domain


    Revsions:
    * FPGA 03
    * CPLD 03


    Release download hier.

    Revision 4 ist da!


    * fixed inversion of output signal.
    * reworked register block to move clock rate transition away from registers.
    * repair bug in sustain state of envelope generator.
    * debug code to check differences between both SIDs in mono mode (ongoing).
    * slightly modify 6502-bus timing.
    * improve voice muting by attenuating unmuted voices to 75% whenever something else is muted.
    This results in a more balanced volume distribution among the channels.
    * FPGASID specific registers will not be reset by a hard reset now.


    Revsions:
    * SVN commit-ID 84
    * FPGA 04
    * CPLD 03


    download hier.

    Tadaaa! Revision 5:


    * reworked clock rate transition to avoid duplicate usage of input signals
    * fix reset of exponential counter in envelope generator
    * problem of envelope generator caused by improper enable signals in startup phase. Audible in H.E.R.O.
    * added trace memory functionality for debugging
    * added memory-saving mode in analog block by disabling 6581 processing
    * tidy up code of register block (remove disabled code)
    * repaired SYNC bit behaviour causing strange effects in the sound effects of KATAKIS
    * fixed some synthesis warnings


    Revsions:
    * SVN commit-ID 88
    * FPGA 05
    * CPLD 03


    download hier.

    Als kleines Weihnachtsgeschenk für alle Alphatester kommt nun die Firmware Version 06 mit folgenden Neuigkeiten:



    • Permanentes Abspeichern der FPGASID Konfiguration im Flash Memory
    • Firmware Updates direkt vom C64 aus ohne USB-Blaster
    • Ein neues Konfigurationsprogram 'ConfiGuru' mit diesen Funktionen:

      • 'Easy' und 'Expert' Konfiguration
      • Konfiguration permanent im Flash speichern
      • Diagnose Seite
      • Firmware Flashen
    • Und ein paar weitere Bugfixes (Hüllkurven, mixed waveforms, Paddles...)


    Diese Firmware muss noch per USB-Blaster programmiert werden. Alle weiteren Firmware Versionen lassen sich dann direkt vom C64 aus programmieren!

    Release Information Revision 07


    ConfiGuru:
    * frame color switching during disk IO to avoid unlpeasant raster irq disturbance
    * add support for config index in diag page
    * add volume control in diagnostic page
    * add help function
    * set version to 0.9


    FPGA:
    * add support for config index readout
    * add register swap mode
    * fix timing issue in voice generator with additional pipelining
    * change fitter seed to fix a timing issue
    * fix 8580 filter integer overflow
    * set revision number to 07


    CPLD:
    * no change - still revision 04


    Download here

    Release Information Revision 08


    ConfiGuru:
    fix program version display
    update digifix state on startup
    add hint to press space after disk on disk change
    improve diagnostics to reduce side effect of $DE00 register access
    renamed 'save' buttons to 'memory'
    print program version on list after load


    FPGA:
    repair loading of saved config at power-up
    changed revision number to 08


    CPLD:
    no change


    Download here

    Release Information Revision 09

    Caution!
    CPLD revision 5 is intended for the production hardware revision 1.4 only!
    For old FPGASID_proto1 hardware (Prototypes used during Alphatest phase)
    do NOT update the CPLD revision. Keep CPLD revision 4 for this hardware.
    Otherwise the Paddles will stop working.

    FPGA: rev 9
    reduce plop noise on reset
    add dithering to delta sigma converters to reduce idle tones
    Prepare selectable bias for 6581 filters
    make filter bias setting savable and readable from flash
    implement C128 mode
    improve pipelining in analog block
    data bus select signal moved from CPLD to FPGA
    changed project settings and constraints to improve timing



    CPLD: rev 5
    modify for rev 1.4: add discharge pin to CPLD


    Software: 0.B
    add support for filter bias
    added c128 mode to diag screen
    make adoptions for C128 mode detection
    facelift of diagnostic screen
    fix a bug in DE00 selection


    Download here

    Release Information Revision A



    FPGA: 0.A
    fix a register access bug of the filter bias register
    adjust 6581 Filter bias setting range
    fix 6581 filter cutoff frequency bug for higher fc values
    share 6581 non-linearity lut between voices DAC and filter cutoff frequency to safe resources
    apply workaround to avoid idle tones in 6581 analog filter on high resonance values
    apply proper rounding in analog simulation
    Add output configuration to switch both outputs together on one signal, allowing setups with single audio signal
    Allow LEDs to be disabled
    add LED disable bits separately for heatbeat and voices
    Avoid funny sounds during flashing in combination with the 1541Ultimate
    Fix a compatibility problem with EasyFlash 3 modules



    Software: 0.D
    Add extended CRC check for firmware binary images
    on firmware updates, delete flash page as latest as possible rather than the full flash in the beginning
    reverse flashing order of firmware files to save one disk change with dual disk flashing method
    fix a bug that makes flashing impossible when F is pressed after disk check has passed
    optimize flashing messages to make error messages more clear
    change method of FPGASID detection
    add Configuration for LED
    add Configuration for output mode
    support for separated LED bits (heartbeat and voices)
    add timeout to flash commands to fixed potential hanging
    renamed Output mode to dual/mix



    Download here