FPGA support for the open source IceStorm toolchain?

Hello,

You could try -- there isn't much xilinx specific that we have done. The design is however currently VERY big, so you might not be able to fit into the lattice part. Give it a go and see how you go, if you want.

Paul.

That FPGA seems to have 80Kb block-ram according to the site (if I remember correctly), so it's faaaar too less for this, not even mentioning other FPGA resources and capabilities now. Though I am not even near to Paul's knowledge here, but I think, to port the project to another FPGA (including another vendor) first needs an FPGA which has similar capabilities at least, at the minimum. If I planned something like this, I started with comparing the features/capabilities first to know if it's possible at all in theory.

In the least you would need a large external SRAM or similar to have any hope, if the part has only 80KB of BRAM built in.

Paul.

That's interesting, would it work with the same timing to use an external SRAM if built-in BRAM is not enough anymore? Yeah, SRAM (so no DDR madness, etc), but still, Mega65 has quite tight timing there, at least this is what I thought on this topic.

I didn't say that that is ALL you would need It would be the starting point.
That said, what we really need to do with the M65 is to pipeline the video memory fetches, so that they can happen quite asynchronously to the bus. That, plus some similar work on the CPU would let us totally decouple the design from the memory latency, provided the overall bandwidth still ended up being high enough in practice. The half-finished new CPU design (which may or may not ever get used) is built based around this concept.