While looking at adding compiler support for 45GS02 I have been mapping the entire instruction set including the flat-memory access and virtual 32-bit register. Both additions to the instruction set seem very useful and it is nice to be able to combine them.
However, I do wonder if it ever makes sense to combine virtual 32-bit register and indexed modes, since the data in X/Y will both be used for indexing and as part of the virtual register. For instance ORQ ($12),Y will both use Y for indexing, but also as an argument to the OR instruction which very rarely makes sense.
Are there any use cases where indexed addressing modes makes good sense when combined with the virtual 32-bit register?
If not have you considered only supporting virtual 32-bit register for the addressing modes that do not include indexing? In practice that would mean not supporting the virtual 32-bit register for modes zp,X abs,X abs,Y (zp),Y (zp,X).