First thought, before I look at your code, is that you have enabled trimming the right hand pixels from the characters. Yes, you are setting the screen ram to $5000 + card. But bits 5 to 7 of the high byte indicate the number of pixels to trim. The top 3 bits of $50 are 0b010 = 2 in decimal, so indeed it _should_ be trimming the two right most pixels from each character. Change the $5000 to $1000, and it should work -- but I haven't had the chance to test it.
LG
Paul.
Put a pull request in for me to remove debug status from those registers. I am happy for them to be long-term supported.
LG
Paul.
That sounds correct, yes.
LG
Paul
Because the MEGA65's cartridge port behaviour is much more flexible (its direct connect to the FPGA, with nothing else actually on the "bus") we can do all manner of craziness, including having a DAC and an ADC in the cartridge to cross over into the analog domain, have whatever magic lives there, and then bring it back to the digital domain for output through the MEGA65's existing audio outputs.
Paul.
Yes, we should update the C65 page on the C64 wiki.
LG
Paul
Anyway, when you are ready, and if you are willing, we would love to incorporate your work into the MEGA65 and give a good testing out there. We would need to re-integrate our extra 16 state exposure registers to support freezing, but that's not hard.
In short: We really love and admire what you are achieving 
LG
Paul.
I think either FETs or open-drain with pullup would be fine. In fact, on reflection, I'd most likely go open-drain with pull-up, which is already how we do this on the IEC port etc on the MEGA65.
Paul.
... oh, and just documenting the Hypervisor calls and error codes would also be tremendously useful.
LG
Paul.
Yes, my understanding is that the CNT pin can be clocked faster than PHI2. I can't remember if I ever did it, though. I think I looked at using it for 64NET for speeding up loading, by allowing the PC to use the shift register to push data over faster than via the parallel interface, but my recollection was that PCs at the time couldn't write to the ISA-connected printer port fast enough to make it beneficial.
Now, as for making a CIA replacement chip, I'd use a cheap Lattice FPGA/CPLD part, some of which I think are already 5V tolerant, and add the necessary level converters. I'd also be tempted to implement the level converters using transistors rather than buffer chips for the IO lines, so that the full behaviour of the pins can be properly implemented. While you need 2 transistors for every IO pin, they are little and could be placed on both sides of the PCB.
LG
Paul.
Morning all,
A few important points:
1. The internal drive on the MEGA65 is currently READ ONLY until we implement the MFM writing routines in the VHDL in the bitstream. This is on my list.
2. You can only mount D81 images if they are _not fragmented_ on the FAT 32 file system (because the MEGA65 hardware emulation of the floppy drive needs a contiguous slab of SD card space to do the emulation efficiently.)
3. The message "ERRNO" is correct, and means "Error Number" following the C convention. The list of error codes can be found in https://github.com/MEGA65/mega…r/src/hyppo/constants.asm Here we see that the error is, indeed, "dos_errorcode_image_fragmented", i.e., the D81 image is fragmented on the FAT file system.
Ideally the freeze menu would handle this error more gracefully than it does right now, preferably by offering to defrag the image (or doing it automatically). A general purpose defrag utility would also not go astray. These would be great contributions if someone in the community is willing to work on them. They would both be written in C, so you wouldn't even need to be able to programme in assembly language.
LG
Paul.
... also, if you do it in VHDL instead of verilog, we'd love to put an improved CIA in the MEGA65
Paul.
Hello,
The latest mega65 cia is at https://github.com/mega65/mega65-core, but it is still incomplete.
You should talk to Gideon, as he has a much more accurate CIA implementation than we have.
Yes, CNT can count at upto about 16MHz on real CIAs, as has been hinted at above.
Paul.
So nice to be rid of the slow checksum check. Thank you
LG
Paul.
Error LED blinks again from C64 mode, but not from C65 mode.
Paul.
Thanks
That's weird re 1MHz/2MHz. Not sure the root cause of that.
LG
Paul.
Yes, we need to get the PSRAM working again.
Paul.
Er, that's where I started it, I think. I should remove that.
The one I meant is at:
https://github.com/gardners/raycaster.git
LG
Paul.
Thanks. I've just seen them. Not sure when I will be able to attack them with moving and Christmas coming up in the next few days. But will try to attack them soon. For MEGA MAZE, you could try investigating the DMA routine in the repo (its in mega65-tools, I think) and try to work out what it is doing wrong. I don't think that MEGA MAZE uses the 8MB expansion RAM, but who knows, it might, which would explain the problem ...
Paul.
I'm currently aiming to have dip switch settings for the audio on/off, and for PAL/NTSC in freeze and boot displays.
LG
Paul.
