Regarding (lack of) 0Hz operation. The MOS 6526 is probably filled with dynamic flip flops. The VIC-II is full of them, and so is the CPU. In the VIC II (the dieshots I have analyzed), the registers are refreshed by one of the clocks.
Regarding (lack of) 0Hz operation. The MOS 6526 is probably filled with dynamic flip flops. The VIC-II is full of them, and so is the CPU. In the VIC II (the dieshots I have analyzed), the registers are refreshed by one of the clocks.
Maybe this can spark some inspiration. It did for me and me VICII dieshot projects, but the VIC II dieshots takes for ever to vectorize. The metal layer needs to be cleaned away.
Anyway, this video shows a C++ program simulating the Z80 from vectorize layers. If you know a little C, you can see the routing, charge sharing, measurements test points hard coded.
Bitte melde dich an, um dieses Medienelement zu sehen.
Ps. I made a test cart for my VHDL6526 project. I might share it soon when I have finished the PCB.