1) What happens when both the /CS (for Sid 1) (pin 8 of the IC-socket) and the /I/O-wire (for Sid2) (red wire) are active?
I know, when these wires are connected in the correct way in the Cbm64 (or Cbm128) (just as the installation-manual says), the Cbm shall never make both wires active at the same time.
But I'm talking here about using the FpgaSid in a self designed device.
2) The extra powerline Vdd (pijn 28 ), is that used by the FpgaSid? - I mean the 12V (for a 6581) (or the 9V for a 8580) power-line.
3) The both Filter-caps (pin 1-2 and pin 3-4), are those used by the FpgaSid?
A little background story ...
I'am building a machine with 4 Sid's (2* 6581 and 2* 8580). The Sid's are controlled by an Arduino, simulating a 65xx-data/address-bus. The Sids are selected thru a 74hct138 Decoder.
Last year, when designing the output amps, my both 6581 Sids got defect by an unknown reason, but probably due to much heat.
So with the FpgaSid I see a good alternative for the original Sids. And now I though of using the /CS (pin 8 ) for selecting Sid1 and the /IO red-wire for selecting Sid2 in eacht FpgaSid.
The whole decoding-part is already build and I'm not planning to change that design - unless it is absolutely necessary.
To my Sid-board are wires for the Data/ Address and control-bus, PLUS 8 seperated /CS-lines (the 74hct138 is a decoder with 8 outputs).
BUT I have to redesign my Sid-board, so that's why I ask the questions about the powerlines and caps (that can save some space on the board).