HWERROR uses only DF00 address, writes values 00..FF(last one) only into DF00, so the first byte is FF. No pattern.
Visible pattern is from previous HWERR2 !
So, we only know there is problem ... but is it because STA $DF00,X ? Or it is also for STA $DF00, but never for address xx00 ?
Next time we can test it. If only STA $DF00,X is not working we could have workaround.
OK, back to HWERR2.
Please, wait for Red screen and save me binary $6000...$7FFF, pls. Thanks.
So, here is instruction STA $DF00,X writing to SRAM when "HW error" comes. It takes 5 clocks.
The 5th clocks writes value to the address, better to say during halfclock when O2=1 (or PHI2=1), CPU on the bus.
Thanks to scanner & @borstie, just look at this 5th halfclock.
Note: I have deleted leading 2 bytes, starting PRG address $6000, not part of the sampled data.
The blue strip shows the O2=1, CPU on the bus, offsets 760-828.
2nd column (marked red) is C64 data bus, here must be stable value $FD writing to address $DFFD.
Instead of this here are unstable (?) values: $F5, $05, $75, $FD etc. And this is problem !!!
My controller copied the value in my sync point to chip memory data bus, instead of $FD, there is $F5 (marked green).
The rest is correct, wrong value $F5 is there 6 clocks (50MHz), /CS & /WE only 5 clocks (value $7A on 5th column, 5x20ns=100ns).
Address is also stable, except offset 7E8, when I copied value $7A to the mem bus (strong disturbing).
Hmm, I have to think about this.
At the beginning of the sampled data you can see end of "start scanner" instruction STA $DEE0,
Mode value $06 nice stable on the C64 data bus on the 2nd column,
C64 address $DEE0 on the 3rd, 4th columns !
...and thanks for describing the technical background, i appreciate that...
I have also retested meantime on my ASSY 469 the same data write with the similar values. No disturbing at all, everything nice stable.
So I have some ideas, but I need to think about it.
In next 2 weeks I will be not able to test on my C64 due to house repairing. But I will be able sometimes to produce & compile fw/prgs etc. on my laptop .
My theory is that some signal from assy board must be unstable and FW reacts badly by switching read/write from/to C64 bus.
So, probably disturbing comes from my FPGA.
This responsible controller is the main one. Every change can harm all functionality, booting, carts etc.
This is like "main crossing way in the town center".
So, I'm trying to find out the source of unstability.
2. Test wr0003:
no color changes after starting wr0003
the behavour of the cartridge changed somewhat:
i had red screens, red screens with shortly flashing lines, red screens and then the same screen as if i had no sd card inserted (with red border), screens with garbage (chars as if the system crashed with blue screens or grey screens with orange border) and some variants kicking me to the prompt (blue screens, red screens)