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Amiga core for the MEGA65

  • What about an Amiga Core (minimig).

    I know about the Thread name, but for only one question, i don´t want to make another one.

    But it is from Commodore, i know it is not from Commodore, from the amiga team.

    I still haven´t a FPGA now, because everybody make cores for their own favorite system and the mega65 team had made their system on the nexys4 DDR.

    I haven´t bought an FPGA till today, because if i want them all(Commodore) i need more than one.

    For me the C65 is an successor of the C128 and not from the C64 and i am worry about no C128 fpga system, but it can be very useful to support the amiga core, because

    1. It is from Commodore

    2. A lot of Software

    3. The C65 was discontinued because they bought the amiga

    4. The Keyboard can handle it

    5. Sinclair had nothing to do with commodore

    6. It´s still unclear, if we have very good games, software etc. for the mega65, if not, we have still a stylish commodore computer, that can still run most commodore software ever written and can for many even be the cause to buy it.

    Amiga Software

    C64 Software

    Mega65 Mode

    i mean the amiga is not an 8 bit computer and the zx is, but why not.

  • Hi Bloody77


    please open next time a new thread. the Amiga core for the MEGA65 is not a "just one question".

  • Just for historical correctness: the C65 wasn‘t stopped because C= bought Amiga. The acquisition of Amiga had long have happened before the C65 project even started.


    AFAIK they stopped the development of a 16Bit Unix Machine for the Amiga1000.


    What killed the C65 was that C= was short of money and engineering ressources end of the 80ties, early nineties and management had no clear vision if a lower cost Amiga (A300) or an extended C64 game system or an more extended but less compatible 8bit system (C65) could help in the home/gaming budget market that was under heavy attack by NES and Sega.

    They tried all (C64GS, Amiga 600 as products and C64D, C65 as nearly finished prototypes) and failed on all.


    Meanwhile this took ressources for high-end and next-gen Amigas and innovative stuff (ECS, A3000, Unix for Amiga, AmigaOS >= v2, CDTV, AA & AAA Chipsets, etc.).


    Best book so far to understand what killed C=:

    Brian Bagnal „Commodore - The final years“

  • my personal hope really is, that the MEGA65 attracts even more people.

    The MEGA65 should be capable of housing all our favorite Retro machines

    (maybe not all but more than any other comparable project).


    So i would wish for an Amiga core as well. Even if it would be "only" an A500+

  • I’m quite sure that the Xilinx FPGA of the Mega65 can cope the the MinimigAGA core, as it still fits the Cyclone3 with 23000LEs in MiST and the even smaller Cyclone4 in SiDi.


    Even RTG graphics was possible to add to the MiST.


    But surely the HDL code needs some adaption and IO might be quite different. MiST(er)&co use ARM CPUs to handle USB devices and onscreen menues.

  • I’m quite sure that the Xilinx FPGA of the Mega65 can cope the the MinimigAGA core, as it still fits the Cyclone3 with 23000LEs in MiST and the even smaller Cyclone4 in SiDi.


    Even RTG graphics was possible to add to the MiST.


    But surely the HDL code needs some adaption and IO might be quite different. MiST(er)&co use ARM CPUs to handle USB devices and onscreen menues.

    I'm really not sure, but maybe the problem is more the memory, that HyperRAM in MEGA65 is not fast enough for that. I would assume, FPGA may be enough for the core itself ... But speaking of its internal BRAM it's not, but surely external RAM is intended to use in this case (I mean external to FPGA ...) but there is the worry than about its speed. Though, I have no idea what speed would be needed for an Amiga AGA chipset implementation from the memory, and if the mentioned HyperRAM is fast enough for that or not ...

  • Doesn‘t the Mega come with some external SRAM or SDRAm?

    No. It comes with something called "HyperRAM". I don't know about the exact details but it's basically something (??) like SPI serial access but with more bits, maybe octal-SPI or such. But still does not have "classical" bus like with usual RAM chips that you have address bus and data bus separated etc (OK, honestly even DRAM chips already have RAS/CAS stuff to deal with addresses, so ... but still it's different). Anyway someone should answer this have more knowledge on the topic than me ;(